Ken Eguro



Education
Ph.D., Electrical Engineering
1/2003 – present
University of Washington – Seattle, WA
Thesis – Supporting Heavily-Pipelined Reconfigurable Computing on Commodity Devices
Advisor – Dr. Scott Hauck
Ph.D. expected 2008
Finalist for 2004 Microsoft Research Fellowship
Nominated for 2003 Yang Research Award
M.S., Electrical Engineering
6/2001 – 12/2002
University of Washington – Seattle, WA
Thesis – RaPiD-AES: Developing Encryption-Specific FPGA Architecture
Advisor – Dr. Scott Hauck
Graduate Work
9/2000 – 6/2001
University of Illinois Champaign, IL
Nominated for Harold L. Olesen Teaching Assistant Award
B.S., Computer Engineering
9/1996 – 6/2000
Northwestern University – Evanston, IL
Graduated first in Computer Engineering curriculum, Class of 2000
IEC Everitt Award for 1999-2000
Treasurer of Eta Kappa Nu Honor Society, Beta Tau Chapter, 1999-2000

Work Experience
Research Assistant
6/2001 – present
EE Dept., University of Washington – Seattle, WA
Member of Adaptive Computing Machines and Emulators Lab
Instructor
1/2006 – 3/2006
3/2006 - 6/2006
9/2006 - 12/2006
EE Dept., University of Washington – Seattle, WA
Course Instructor for EE541 – Automatic Layout for Integrated Circuits
Course Instructor for EE471 – Computer Design and Organization
Course Instructor for EE471 – Computer Design and Organization
Nominated for 2006 Electrical Engineering Department Outstanding Teaching Award
Intern
6/2004 – 9/2004
8/2005 - 11/2005
Microsoft Research, Hardware Device Group – Seattle, WA
Developed graphical programming language for a exploring a prototype reconfigurable computing platform
Developed early applications for prototype system to evalutate strengths and weaknesses of programming model.
Teaching Assistant
9/2000 – 6/2001
ECE Dept., University of Illinois – Champaign, IL
Conducted one of three lectures held each week for ECE290 - "Introduction to Computer Engineering"
Undergraduate Researcher
1/1999 – 6/2000
9/1998 – 6/2000
ECE Dept., Northwestern University – Evanston, IL
Research in fast placement and routing algorithms with Dr. Majid Sarrafzadeh
Research into FPGA layout synthesis and applications of reconfigurable logic in high-performance computing with Dr. Scott Hauck

Research Interests Publications Personal References

Please email eguro@eguro.com for further contact information